1. Field of the Invention
The present invention relates generally to a varactor, and more particularly, to a method for fabricating a PN-junction varactor having improved quality factor (Q factor).
2. Description of the Prior Art
A varactor is, essentially, a variable voltage capacitor. The capacitance of a varactor, when within its operating parameters, decreases as a voltage applied to the device increases. Such a device is useful in the design and construction of oscillator circuits now commonly used for, among other things, communications devices. Varactors are typically employed in voltage-controlled oscillators (VCOs) where a frequency of an oscillator is controlled by an applied current or voltage. In such instances, the VCOs are used when a variable frequency is required, or when a signal needs to be synchronized to a reference signal.
Numerous varactors have been developed and are employed in integrated circuit technologies, for example, PN-diodes, Schottky diodes or MOS-diodes as a varactor in bipolar, CMOS and BiCMOS technologies. Among these, two varactor structures are most frequently used: the PN-junction varactor and the MOS varactor. Currently the PN-junction varactor is predominantly used in LC oscillators. Both these structures can be implemented using standard CMOS processes.
Referring to FIG. 1, a prior art PN diode varactor is illustrated in a cross-sectional view. As shown in FIG. 1, a substrate 10 includes an N-well 12, and a plurality of isolation structures 14, such as field oxide layer or shallow trench isolation (STI), on surfaces of the N-well 12 and the substrate 10. The isolation structures 14 define a plurality of predetermined regions on the N-well 12 to form at least an N-type doping region 16 and a P-type doping region 18, thus completing a diode structure having a PN junction. When the diode is reverse-biased, a depletion region occurs in the PN junction of the diode and acts as a dielectric, so that the N-type doping region 16 and the P-type doping region 18 separated by the dielectric form an equivalent capacitor. With an adjustment in the voltage across the anode (the P-type doping region 18) and the cathode (the N-type doping region 16) of the diode, a width of the depletion region varies to change the equivalent capacitance of the varactor.
Referring to FIG. 2, a prior art MOS varactor is illustrated in a cross-sectional view. The prior art MOS varactor is formed on an N-well 22. The prior art MOS varactor includes a polysilicon gate structure 26 serving as an anode of the MOS varactor, a gate oxide layer 28 between the gate structure 26 and the N-well 22, and two N+ doped regions 24 on both sides of the gate structure 26, wherein the N+ doped regions 24, which are implanted in the N-well 22, serve as a cathode of the MOS varactor. N type lightly doped drain regions 25 are also provided.
The main drawback of the prior art PN junction varactor as set forth in FIG. 1 is a low maximum to minimum capacitance ratio and small quality factor (Q factor). The MOS varactor does not suffer on this account, with a high maximum to minimum capacitance ratio of roughly four to one for a typical 0.25 μm CMOS process. Furthermore, the MOS varactor's ratio increases in deep submicron processes due to the thinner gate oxide used. However, the MOS varactor's transition from maximum to minimum capacitance is abrupt. This gives a MOS varactor a small, highly non-linear voltage control range.